尔雅Principle of Microcomputer_1章节答案(学习通2023课后作业答案)

Chapter 1 Computer Basics

quiz for chapter 1

1、尔雅Which of the following devices does not include a computer?章节
A、Non-programmable calculator
B、答案Smartphone
C、学习Desktop computer
D、通课Server

2、后作Which of the following devices includes an embedded computer inside?业答
A、Smartphone
B、尔雅Desktop computer
C、章节Laptop computer
D、答案Server

3、学习What is 通课the name of a set of signal lines in a computer system responsible for transmitting data storage locations?
A、Data bus
B、后作Address bus
C、业答Control bus
D、尔雅Status bus

4、What is the name of a set of signal lines that play a management and control role in the transmission and exchange of data in computer systems?
A、Data bus
B、Address bus
C、Control bus
D、Status bus

5、What does computer instructions refer to?
A、A sequence of commands to achieve a given task
B、Collection of all commands of a computer
C、Commands that the computer can recognize and execute
D、High-level programming language statements

6、What does computer program mean?
A、Command sequence to achieve a given task
B、Collection of all commands of a computer
C、Commands that the computer can recognize and execute
D、High-level programming language statements

7、What is the code of instructions in the computer?
A、ASCII code
B、binary code
C、Hexadecimal code
D、Decimal code

8、Which component in the computer is used to pre-store instruction and data in order to make the program run automatically?
A、CPU
B、Memory
C、IO interface
D、IO device

9、The process of computer instructions’ execution generally includes the following steps 1: instruction decoding 2: performing operations 3: accessing data memory 4: storing results 5: reading instructions, which of the following is the correct order of the process?
A、1-2-3-4-5
B、2-3-4-5-1
C、5-1-2-3-4
D、5-2-1-3-4

10、Which of the following is the binary number of the decimal number 3.25?
A、11.01
B、10.11
C、11.001
D、10.101

11、Which of the following is the hexadecimal number of the decimal number 105.25?
A、
B、
C、
D、

12、What is the bit width of a byte in a computer?
A、4
B、8
C、12
D、16

13、How many bits of a halfword are defined in a 32-bit MIPS computer system?
A、16
B、32
C、64
D、8

14、What code is used for signed integer numbers’ representation in modern computers?
A、original code
B、1's complement
C、2's complement
D、BCD code

15、What code is used for signed real numbers’ representation in modern computers?
A、Fixed-point integer
B、Fixed-point decimal
C、Floating point numbers
D、ASCII

16、What is the bit width of a single-precision floating-point number?
A、16
B、32
C、64
D、128

17、What is the normalized representation of binary number ?
A、1.001101 ×
B、0.1001101×
C、10.01101 ×
D、100.1101 ×

18、What are the bit width and bias of the exponential field of a single-precision floating-point number, respectively?
A、8,127
B、7,127
C、7,128
D、8,128

19、What is the single-precision floating-point number representation of -9.625?
A、
B、
C、
D、

20、What is the single-precision floating-point number representation of 1.5 ?
A、
B、
C、
D、

21、It is known that a computer system stores data in memory in little endianness. If half word data is stored in the memory at address , what is the data stored in the storage unit at address ?
A、
B、
C、
D、

22、It is known that a computer system stores data in memory in little-endian order. If word data is stored in the memory at address , what is the data stored in the memory unit at address is
A、
B、
C、
D、

23、It is known that a computer system stores data in memory in big endianess. If the word data is stored in the memory with the address , what is the data stored in the memory unit with the address?
A、
B、
C、
D、

24、What is the range of values that can be represented by n bits 2's complement numbers?
A、-~
B、-~-1
C、-~-1
D、--1~

25、If two signed numbers participate in calculation, the result is overflow, what kind of situation of the result is in?
A、original code
B、1’s complement
C、2’s complement
D、error

26、Which of the following byte type data calculation does not overflow?
A、 +
B、89+64
C、-64-89
D、-

27、What is the bit width of char type data in C language?
A、8
B、16
C、32
D、64

28、What is the bit width of short type data in C language for 32-bit computer?
A、8
B、16
C、32
D、64

29、It is known that the data in address 2000 to 2003 are 2, 3, 6, 0, respectively. If a 32-bit computer system uses little-endian mode to manage this memory, what is the int type data that the CPU fetches from address 2000?
A、556
B、236
C、632
D、393986

30、It is known that the data in address 2000 to 2003 are 2, 3, 6, 0, respectively. If a 32-bit computer system uses little-endian mode to manage this memory, what is the short type data that the CPU fetches from address 2002?
A、556
B、770
C、632
D、393986

31、Which of the following devices can be used as computer’s output devices?
A、Printer
B、Display
C、Scanner
D、Fax

32、Which of the following devices can be used as input/output devices for computer systems?
A、Hard disk
B、network card
C、Mouse
D、Keyboard

33、Which of the following modules are included in the computer hardware system?
A、Microprocessor
B、Memory
C、Input and output devices
D、Bus

34、What are the basic components of the central processing unit CPU?
A、Arithmetic Logic Unit ALU
B、Controller
C、Registers
D、System bus

35、Which of the following functions are implemented by the controller inside the CPU?
A、Arithmetic and logical operations
B、Read instruction
C、Instruction decoding
D、Send out control signals

36、What are the main functions of the CPU internal registers?
A、Store operands
B、Store intermediate results
C、Store operation result flag
D、Implement logical operations

37、Which of the following types of signals does the data bus transmit?
A、Data in memory
B、Instructions in memory
C、Data of IO devices
D、Status of IO devices

38、What are the main functions of IO interfaces?
A、buffering data
B、information format conversion
C、report the status of IO devices to CPU
D、deliver the command of CPU to IO devices

39、What bit width data can be processed by 32-bit computer via one instruction?
A、8
B、9
C、16
D、32

40、Which of the following different types of 2’s complement numbers represent the true value -8?
A、 in byte
B、 in half word
C、 in word
D、 in byte

41、Which of the following different types of 2’s complement numbers represent the true value -128?
A、 in byte
B、 in half word
C、 in word
D、 in half word

basics of computer

1、Please use the single-precision floating-point numbers (hexadecimal) to represent the following real numbers: 1.625, 34.5, and write out the calculation process and operation results (hexadecimal representation) of the computer to calculate the following formula using single-precision floating-point numbers. 1.625+34.5 1.625-34.5

Chapter 2 Assembly Language

quiz for chapter 2

1、Which of the following computer programming languages is also called a symbolic language?
A、C language
B、Python language
C、Assembly language
D、Machine language

2、What is the process of translating assembly language into machine language called?
A、compile
B、build
C、assemble
D、link

3、What does the computer’s instruction set refer to
A、A collection of all instructions in assembly language
B、A set of instructions that can be executed by a computer
C、Ordered combination of assembly language instructions
D、Ordered combination of machine language instructions

4、What is the meaning of the label before assembly instructions?
A、Variable address
B、Instruction address
C、the function of the instruction
D、Object of the instruction

5、Which of the following parts of the assembly instruction indicates what operation the instruction performs
A、label
B、opcode
C、operand
D、comments

6、Which of the follow symbols is used to mark the beginning of comments in MIPS assembly language?
A、#
B、$
C、//
D、/*

7、Which operand is the destination operand in the MIPS assembly language instruction“add a, b, c” ?
A、a
B、b
C、c
D、whatever

8、When translating the C language statement “a = (c + b)-(d + e) ;” into MIPS assembly instructions, how many assembly instructions should be used at least?
A、1
B、2
C、3
D、4

9、Which of the following registers in the MIPS microprocessor has a constant value of 0?
A、$zero
B、$t0
C、$a0
D、$v0

10、Which of the following types of MIPS assembly instructions has only two operands?
A、Arithmetic instructions
B、Shift instructions
C、Data transfer instructions
D、Unconditional jump instructions

11、Which of the following registers in the MIPS microprocessor indicates the top of the stack?
A、$sp
B、$pc
C、$gp
D、$v0

12、In a 32-bit computer system, if the starting address of “int max[10];” is A, what is the address of max[2]?
A、A
B、A+2
C、A+4
D、A+8

13、If it is known that the starting address of “short array[10]” is stored in register $s0 in 32-bit MIPS computer system, how is the address of array[2] represented in MIPS assembly language instructions?
A、0($s0)
B、2($s0)
C、4($s0)
D、8($s0)

14、If it is known that a 32-bit computer stores data in little-endian order, and defines "short array[4] = { 0,1,12,127};", and the starting address of the array is A, What is the byte data stored in the address A + 5 ?
A、0
B、1
C、2
D、127

15、In order to improve the memory accessing efficiency, computers often adopt boundary alignment strategy to store data. When a 32-bit computer stores word type data in boundary alignment address, which of the following characteristics does the word type data's address have?
A、It's an even number
B、It's an odd number
C、It's a integer multiple of 4
D、It's a integer multiple of 8

16、Assume the variables g and h in the following C language program is stored in register $s0,$s1,respectively. and the short type array A's starting address is stored in register $s0, which one of the following MIPS assembly instruction sequences implements the C statements "g=h+A[8];"?
A、lw $t0, 32 ($s2) add $s0, $s1, $t0
B、lw $t0, 8 ($s2) add $s0, $s1, $t0
C、lw $ t0, 16 ($s2) add $s1, $s0, $t0
D、lw $t0, 16 ($s2) add $s0, $s1, $t0

17、How many fields (domains) is the machine instruction of the MIPS R-type instruction divided into?
A、2
B、4
C、5
D、6

18、Which register is the Rs register of the MIPS R type instruction "add $s0, $s1, $t0”?
A、$s0
B、$s1
C、$t0
D、$v0

19、How many fields (domains) is the machine instruction of the MIPS I type instruction divided into?
A、2
B、4
C、5
D、6

20、Which type of instruction does the MIPS shift instruction “sll $s1, $s2, 10”belong to?
A、R type
B、I type
C、J type
D、Not sure

21、What is the hexadecimal representation of Imm field of the machine instruction related to MIPS assembly instruction “addi $t0, $s3, -32”?
A、0x8020
B、0xff20
C、0x0020
D、0xffe0

22、Which type does instruction jal belong to?
A、R type
B、I type
C、J type
D、Not sure

23、If the address of the MIPS assembly instruction “ag: j ag” is 0x0000 0008, what is the hexadecimal representation of the machine code's lower 26 bits in instruction ”j ag ”?
A、0x0000008
B、0x0000001
C、0x0000002
D、0x0000004

24、Which register is coded in the Rs field in the MIPS conditional jump instruction “beq $t2, $zero, L2”?
A、$t2
B、$zero
C、L2
D、$PC

25、If the starting address of the following MIPS assembly instruction sequence is 0x80000,What is the value of the beq instruction's Imm field represented in hexadecimal? MIPS assembly instruction sequence: loop: sll $s1, $s2, 3 addi $s1, $s2, 4 beq $s1, $t1, exit j loop exit:
A、0x0000
B、0xfffd
C、0x0004
D、0x0001

26、If the starting address of the following MIPS assembly instruction sequence is 0x00400000,What is the value of the j instruction's lower 26 bits represented in hexadecimal? MIPS assembly instruction sequence: loop: sll $s1, $s2, 3 addi $s1, $s2, 4 beq $s1, $t1, exit j loop exit:
A、0x0400000
B、0x0100000
C、0x008000
D、0x0200000

27、Which of the following instructions is to load unsigned byte type data from memory to register?
A、lb
B、lhu
C、lw
D、lbu

28、If it is known that the data stored in each memory unit starting from address 0x80 is 0x80, 0x81,0x82, 0x83, respectively, the value of register $t0 is 0x80, and After executing the MIPS instruction “lbu $t1, 0 ($t0)”, What is the value of register $t1?
A、0x80
B、0x81
C、0xffffff80
D、0xffffff81

29、If it is known that the data stored in each memory unit starting from address 0x80 is 0x80, 0x81,0x82, 0x83, respectively, the value of register $t0 is 0x80, and After executing the MIPS instruction “lb $t1, 0 ($t0)”, What is the value of register $t1?
A、0x80
B、0x81
C、0xffffff80
D、0xffffff81

30、If it is known that the data stored in each memory unit starting from address 0x80 is 0x80, 0x81,0x82, 0x83, respectively, the value of register $t0 is 0x80, and After executing the MIPS instruction “lh $t1, 0 ($t0)”, What is the value of register $t1?
A、0x8180
B、0x8081
C、0xffff8081
D、0xffff8180

31、If it is known that the data stored in each memory unit starting from address 0x80 is 0x80, 0x81,0x82, 0x83, respectively, the value of register $t0 is 0x80, and After executing the MIPS instruction “lw $t1, 0 ($t0)”, What is the value of register $t1?
A、0x80818283
B、0x83828180
C、0x80838281
D、0x83828081

32、Which of the following MIPS assembly instructions is used to push the value of register $s0 onto the top of the stack?
A、addi $ sp, $ sp, -12 sw $ s0,8 ($ sp)
B、addi $ sp, $ sp, -12 sw $ s0,4 ($ sp)
C、addi $ sp, $ sp, -12 sw $ s0,0 ($ sp)
D、addi $ sp, $ sp, -12 sw $ s0,12 ($ sp)

33、Which of the following MIPS assembly instructions pops the value of the top of the stack to the register $s0?
A、addi $ sp, $ sp, -4 lw $ s0,0 ($ sp)
B、addi $ sp, $ sp, 4 lw $ s0,0 ($ sp)
C、lw $ s0,0 ($ sp) addi $ sp, $ sp, 4
D、lw $ s0,0 ($ sp) addi $ sp, $ sp, -4

34、How many memory unit will be allocated by MIPS assembly pseudo-instructions”b0: . byte 1,2,3,4” ?
A、1
B、2
C、3
D、4

35、How many memory unit will be allocated by MIPS assembly pseudo-instructions”b0: . half 1,2,3,4” ?
A、1
B、2
C、4
D、8

36、If the address of h0 in the MIPS assembly pseudo-instruction ”h0: .Half 1,2,3,4” is 0x2000, what is byte type data in the memory address 0x2003?
A、0x0
B、0x1
C、0x2
D、0x3

37、How many memeory unit is allocated for MIPS assembly pseudo-instruction ". asciiz "abcd" "?
A、1
B、4
C、5
D、6

38、Which of the following MIPS assembly directives is used to define a data segment ?
A、.align
B、.word
C、.data
D、.text

39、The data segment defined by the MIPS assembly directives is as follows. What is the address indicated by the variable h0 and how many memory units are occupied by this data segment? .data 0x10010001 .align 2 str: .ascii "abcd" strn: .asciiz "abcdefg" b0: .byte 1,2,3,4,5 h0: .half 1,2,3,4 w0: .word 1,2,3,4
A、0x10010016,47
B、0x10010015,47
C、0x10010012,44
D、0x10010016,48

40、Which of the following are the characteristics of assembly language ?
A、Closely related to computer hardware
B、It is not easy to be identified, but it can be directly executed by a computer.
C、Good independence, versatility and portability
D、Use mnemonics and address symbols to represent instructions

41、Which of the following are the features of a complex instruction set computer?
A、Instruction word length is not fixed
B、Many addressing modes
C、No instruction restrictions on memory access
D、Multiple instruction formats

42、which of the following can the assembly instructions include?
A、label
B、opcode
C、operand
D、comments

43、What are the type of MIPS assembly instructions?
A、R
B、I
C、J
D、A

44、What are the operand addressing modes supported by the MIPS instruction?
A、Immediate Addressing
B、Register Addressing
C、Base addressing
D、Direct Addressing

45、What are the instruction addressing modes supported by the MIPS instruction?
A、PC Relative Addressing
B、Register Indirect Addressing
C、Base addressing
D、Pseudo-direct addressing

46、which of the following registers are used to store the result of the MIPS multiplication and division operation?
A、hi
B、lo
C、$v0
D、$v1

47、which of the following registers is used by the MIPS C compiler to hold the parameters passed from the main program to the subroutine?
A、$a0
B、$v0
C、$v1
D、$a1

48、Which MIPS assembly instruction segments implement the following C language statement functions, assuming that the variables i, j, f, g, h correspond to the registers $ s0, $ s1, $ s2, $ s3, $ s4? if (i==j) f=g+h; else f=g-h;
A、bne $s0, $s1,else add $s2,$s3,$s4 j exit else: sub $s2,$s3,$s4 exit
B、beq $s0, $s1,else sub $s2,$s3,$s4 j exit else: add $s2,$s3,$s4 exit:
C、beq $s0, $s1,else sub $s2,$s3,$s4 else: add $s2,$s3,$s4 exit
D、bne $s0, $s1,else add $s2,$s3,$s4 else: sub $s2,$s3,$s4 exit

49、It is known that the variables i and k correspond to the registers $ s0 and $ s2, and the initial value of i is 0, save is a word array, and the first address is stored in the register $ s3. Which of the following program blocks implement the following C language program blocks? while (save[i]==k) i+=1;
A、loop: sll $t1,$s0,2 add $t1,$t1,$s3 lw $t0,0($t1) bne $t0,$s2,exit addi $s0,$s0,1 j loop exit:
B、loop: add $t1,$s0,$s3 lw $t0,0($t1) bne $t0,$s2,exit addi $s0,$s0,1 j loop exit:
C、loop: add $t1,$s0,$s3 lw $t0,0($t1) bne $t0,$s2,exit addi $s0,$s0,4 j loop exit:
D、loop: sll $t1,$s0,2 add $t1,$t1,$s3 lw $t0,0($t1) bne $t0,$s2,exit addi $s0,$s0,1 j loop exit:

50、If the variables i, j, f, g, and h correspond to the registers $ s0, $ s1, $ s2, $ s3, and $ s4, which of the following MIPS assembly language instructions implement the following C language statement function? if（i<j） f=g+h; else f=g-h;
A、slt $t0,$s0,$s1 beq $t0,$zero,else add $s2,$s3,$s4 j exit else: sub $s2,$s3,$s4 exit:
B、slt $t0,$s0,$s1 bne $t0,$zero,else sub $s2,$s3,$s4 j exit else: add $s2,$s3,$s4 exit:
C、slt $t0,$s1,$s0 beq $t0,$zero,else sub $s2,$s3,$s4 j exit else: add $s2,$s3,$s4 exit:
D、slt $t0,$s1,$s0 bne $t0,$zero,else add $s2,$s3,$s4 j exit else: sub $s2,$s3,$s4 exit:

51、If the variable i corresponds to the register $ a0, the base address of the save array is stored in the register $ s0, which of the following MIPS assembly language instructions implement the following C language statement function? for（i=0;i<10;i++) save[i]=i;
A、add $a0,$0,$0 loop: sltiu $t0,$a0,10 beq $t0,$0,exit sll $t0,$a0,2 add $t0,$t0,$s0 sw $a0,0($t0) addi $a0,$a0,1 j loop exit:
B、add $a0,$0,$0 j check loop: sll $t0,$a0,2 add $t0,$t0,$s0 sw $a0,0($t0) addi $a0,$a0,1 check: sltiu $t0,$a0,10 bne $t0,$0,loop exit:
C、add $a0,$0,$0 loop: sltiu $t0,$a0,10 bne $t0,$0,exit sll $t0,$a0,2 add $t0,$t0,$s0 sw $a0,0($t0) addi $a0,$a0,1 j loop exit:
D、add $a0,$0,$0 j check loop: sll $t0,$a0,2 add $t0,$t0,$s0 sw $a0,0($t0) addi $a0,$a0,1 check: sltiu $t0,$a0,10 beq $t0,$0,loop exit:

52、Which of the following are the characteristics of the high-level programming languages?
A、hardware independent
B、Describe algorithms
C、Good independence, versatility and portability
D、Use mnemonics and address symbols to represent instructions

53、which of the following characteristics do the Reduced instruction set Computer instructions have?
A、All instructions are the same length
B、The function of each instruction is as simple as possible
C、Memory can only be accessed by load and store instructions
D、Most operations are performed on registers

54、Which fields do the MIPS I type instructions have?
A、Rs
B、Rt
C、Imm
D、Rd

55、Which of the following MIPS assembly instructions are conditional jump instructions?
A、beq
B、bne
C、j
D、slt

56、which of the following registers is used by the MIPS C compiler to hold the parameters return from the subroutine to the main procedure?
A、$a0
B、$a1
C、$v0
D、$v1

57、which of the following instructions that the MIPS microprocessor provides to access characters?
A、lb
B、lbu
C、lh
D、sb

58、which of the following instructions can implement the function of multiply ?
A、sll
B、sllv
C、srl
D、srlv

59、which of the following instructions can perform the division by ?
A、sll
B、sllv
C、srl
D、srlv

60、which of the following instructions can perform the function of not?
A、xor
B、nor
C、and
D、or

61、which of the following instructions' Imm field will be unsigned extended when executing?
A、addiu
B、sltiu
C、andi
D、ori

62、which of the following instructions' Imm field will be signed extended when executing?
A、addiu
B、sltiu
C、addi
D、slti

63、The opcodes and operands of computer instructions are represented in binary code in the computer.

64、In an assembly language program, multiple assembly instructions can be written on one line.

65、The operands of MIPS arithmetic instructions must be registers.

66、MIPS machine instruction's length is fixed to 32 bits

67、All MIPS R type instructions have three operands.

68、All MIPS I type instructions belong to data transfer instructions.

69、All MIPS unconditianl jump instructions belong to J type instructions.

70、There is a subi instruction in MIPS instruction set.

71、Assume $t1=0x12345678,$t0=87654321, after executing instruction "add $t2, $t1, $t0" and "addu $t3,$t1,$t0",the values of $t2 and $t3 are same.

72、After executing instruction "mult $t0,$t1", the product is stored in $t0.

73、The instruction "jr $ra" belongs to J type instruction.

74、When executing instruction "jal sum", the MIPS microprocessor first makes $ra=$pc, and then makes $pc=sum.

75、Stack is a special memory area, the data in it can only work in first in last out mode.

MIPS assembly programming

1、Write a subroutine named ABS: the entry and exit parameters are $a0, $v0, respectively, and the function is to find the absolute value of $a0. And write the main program to read the integer from keyboard, and test whether the subprogram handles the positive and negative numbers correctly, and output the absolute value of the integer. It's required to submit your subroutine and main procedures assembly code, and the test screenshot in Mars.

Chapter 3 Microprocessor

quiz for chapter 3

1、The following figure shows the MIPS microprocessor circuit block diagram. When the control signal RegWr is valid, it means that the data is written to the register file. What state should the RegWr be when executing an R-type arithmetic or logical instruction？
A、valid
B、invalid
C、any value
D、high Z

2、The following figure shows the MIPS microprocessor circuit block diagram. When the control signal Mem2Reg is valid, it means that the read data provided by the data memory is written to the register file. What value should Mem2Reg be when executing R-type arithmetic or logical instructions？
A、valid
B、invalid
C、any value
D、high Z

3、The following figure shows the circuit diagram of MIPS microprocessor. When the control signal ALUSrc is valid, it means that the signed immediate number in the instruction participates in the ALU operation after sign extension. What value should ALUSrc be when executing I type data transfer instructions？
A、valid
B、invalid
C、any value
D、high Z

4、The following figure shows the circuit diagram of MIPS microprocessor. When the control signal ALUSrc is valid, it means that the signed immediate number in the instruction participates in the ALU operation after sign extension. What value should ALUSrc be when executing beq instruction？
A、valid
B、invalid
C、any value
D、high Z

5、The structure of the simple instruction set MIPS microprocessor is shown in the following figure, what is the width of the signal lines B, C, D, E and F，respectively？
A、16,5,5,5,16
B、26,5,5,5,10
C、26,5,5,5,16
D、6,5,5,5,6

6、The structure of the simple instruction set MIPS microprocessor is shown in the following figure, which part of the instruction machine code does the signal lines G come from?
A、Instr[5:0]
B、Instr[15:0]
C、Instr[31:26]
D、Instr[10:6]

7、The structure of the simple instruction set MIPS microprocessor is shown in the following figure. Which description is correct about the valid data path for the execution of the R-type instruction?
A、paths marked with C,D,E,K,J,P,L,W,S,T are valid
B、paths marked with C,D,E,F,K,U,P,W,S,T are valid
C、paths marked with C,D,E,K,J,P,L,N,O,T are valid
D、paths marked with C,E,F,K,J,P,W,V,S,T are valid

8、The structure of the simple instruction set MIPS microprocessor is shown in the following figure. Which description is correct about the valid data path for the execution of the lw instruction?
A、Paths marked with C,D,E,K,J,P,L,W,S,T are valid
B、Paths marked with C,D,F,K,U,P,I,L,W,S,T are valid
C、Paths marked with C,D,E,K,J,P,L,N,O,T are valid
D、Paths marked with C,E,F,K,J,P,W,V,S,T are valid

9、The structure of the simple instruction set MIPS microprocessor is shown in the following figure. Which description is correct about the valid data path for the execution of the sw instruction?
A、Paths marked with C,D,E,K,J,P,L,W,S,T are valid
B、Paths marked with C,D,F,K,U,P,I,L,W,S,T are valid
C、Paths marked with C,D,F,K,U,P,J,W,S,T are valid
D、Paths marked with C,E,F,K,J,P,W,V,S,T are valid

10、The structure of the simple instruction set MIPS microprocessor is shown in the following figure. Which description is correct about the valid data path for the execution of the beq instruction?
A、Paths marked with C,D,E,K,J,P,L,W,S,T are valid
B、Paths marked with C,D,F,K,U,P,I,L,W,S,T are valid
C、Paths marked with C,D,F,K,U,P,J,W,S,T are valid
D、Paths marked with C,D,F,U,K,J,M,W,V,S,T are valid

11、The structure of the simple instruction set MIPS microprocessor is shown in the following figure. Which description is correct about the valid data path for the execution of the j instruction?
A、Paths marked with C,D,E,K,J,P,L,W,S,T are valid
B、Paths marked with C,D,F,K,U,P,I,L,W,S,T are valid
C、Paths marked with C,D,F,K,U,P,J,W,S,T are valid
D、Paths marked with B,O,N,T are valid

12、What operations does the ALU unit perform，when the simple instruction set MIPS microprocessor performs data transfer instructions?
A、addition
B、subtraction
C、and
D、or

13、What operation does the ALU unit perform when a conditional jump instruction is executed by a simple instruction set MIPS microprocessor？
A、addition
B、subtraction
C、and
D、or

14、Assume that a microprocessor has a 5-level pipeline. If each part of the pipeline executes in a clock cycle, how many instructions can the microprocessor complete executing in 9 clock cycles?
A、5
B、6
C、7
D、8

15、What does superscalar technique mean?
A、The execution unit of instructions in a microprocessor is independent and works in parallel
B、The microprocessor has multiple pipelines
C、The integrated microprocessor chip has multiple logical CPUs inside
D、A computer system has multiple independent microprocessors

16、what does multi-core processor mean?
A、The execution unit of instructions in microprocessor is independent and works in parallel
B、The microprocessor has multiple pipelines
C、The integrated microprocessor chip has multiple logical CPUs inside
D、A computer system has multiple independent microprocessors

17、If the microprocessor assigned a dedicated memory area to save the exception handlers, whose base address is the constant Imm, and each exception handler has a fixed memory size 32B. when exception events N occurs, which value is the program counter (PC) filled with?
A、Imm
B、32N
C、Imm+32N
D、Imm+32

18、Which of the following description of the interruption vector table is true?
A、The memory space that holds the exception handler entry address
B、The memory space that holds the exception event number
C、The memory space that holds the exception event handlers
D、The memory space that holds the breakpoint address

19、Which IO interface does the standard IO interface of embedded computer systems generally refer to?
A、GPIO
B、UART
C、JTAG
D、Network

20、which of the following operations does a microprocessor generally need to support?
A、Arithmetic logic operation
B、data transfer
C、program control
D、Floating Point Calculation

21、which of the following are the basic interfaces between microprocessors and other components inside the computer?
A、address bus
B、data bus
C、control bus
D、clock,reset

22、Which of the following parts of instruction's machine code are used to generate the control signals of ALU unit?
A、Op
B、Funct
C、Rs
D、Rt

23、Which of the following events are called exceptions in a computer system?
A、an overflow occurs when calculating
B、illegal machine instruction encountered
C、The external device requests the input and output of the data
D、Hardware failure of computer system

24、Which of the following functions should the microprocessor support about exception handling?
A、identify exception events
B、store breakpoint
C、store exception handler
D、set up the corresponding relationships between the exception handler and exception event

25、Which of the following modules does embedded microcontrollers generally contain?
A、microprocessor
B、Memory
C、IO interface
D、IO device

26、Which of the following modules does an embedded computer's minimum hardware system generally contain?
A、microprocessor
B、Memory
C、Standard IO interface
D、Debug Interface

27、What are the ways for microprocessors to store breakpoints when the microprocessor handles exception events?
A、special registers to store breakpoints
B、the stack to store the breakpoint
C、the heap to store the breakpoint
D、variables to store breakpoints

controller design of simple MIPS instruction set microprocessor

1、Please use Verilog HDL to describe the function of the controller(Fig.1) of the simple instruction set signle cycle MIPS microprocessor(Fig.2), it's required to use three modules to describe: the top module, the main controller module and the ALU controller module. Fig.1 Fig.2

Chapter 4 Storage System

quiz for chapter 4

1、Which level of the storage system does the hard disk belong to?
A、cache
B、internal memory
C、on system external storage
D、off system external storage

2、Which type of semiconductor memory chip is used for the cache?
A、EEPROM
B、SRAM
C、DRAM
D、Flash

3、What is the name of the module that implements memory management in the microprocessor?
A、ALU (Arithmetic Logic Unit)
B、RF (Register file)
C、CU (Control Unit)
D、MMU (Memory Management Unit)

4、How many physical pages does the computer system have, which has 1GB of physical memory and the page size is set to 4kB?
A、256K
B、1M
C、512K
D、128K

5、The cache capacity of a computer storage system is 64B, each line is 8 bytes, and the direct mapping strategy is adopted. Initially there is no data in the cache and all lines have a valid bit of 0. When the CPU accesses the data at memory physical address 0x12, which part of the address space in memory will be loaded into which line in the cache, assuming the cache line number starts from 0?
A、Data at memory address 0x12 ~ 0x19 is loaded into cache line 1
B、Data at memory address 0x12 ~ 0x19 is loaded into cache line 2
C、Data at memory address 0x10 ~ 0x17 is loaded into cache line 1
D、Data at memory address 0x10 ~ 0x17 is loaded into cache line 2

6、The cache capacity of a computer storage system is 2MB, each line is 128 bytes, and the direct mapping strategy is adopted. Initially there is no data in the cache and all lines have a valid bit of 0. When the CPU accesses the data at memory physical address 0x1012, which part of the address space in memory will be loaded into which line in the cache, assuming the cache line number starts from 0?
A、Data at memory address 0x1012 ~ 0x1091 is loaded into cache line 31
B、Data at memory address 0x1012 ~ 0x1091 is loaded into cache line 32
C、Data at memory address 0x1000 ~ 0x107F is loaded into cache line 31
D、Data at memory address 0x1000 ~ 0x107F is loaded into cache line 32

7、What does the write-through strategy in computer storage systems refer to?
A、When the CPU writes the memory data, when the cache misses, the CPU writes the data to the memory and then the cache controller copies a new cache line to the cache.
B、When the CPU writes the memory data, when the cache misses, the CPU only writes the memory and not the cache.
C、When the CPU writes memory data, when the cache hit, it not only updates the corresponding cache content, but also writes to memory.
D、When the CPU writes memory data, only the cache is written when the cache hits, not the memory, and the data is written to the memory only when the cached data is to be replaced.

8、What exception will be generated if the information that needs to be accessed is not in internal memory during the program running on a computer system using virtual memory technology?
A、Page fault
B、Illegal instruction
C、Hardware failure
D、Reset

9、If the information needed to be accessed is not in the internal memory during the program running on a computer system using virtual memory technology, which of the following components will load the information from the hard disk into the memory?
A、Operating system
B、Memory management unit
C、Cache Controller
D、Bus interface unit in CPU

10、A computer system using virtual memory technology needs to establish an address mapping table in order to map a program's virtual address to a physical address, which of the following is used to fill the address mapping table?
A、Operating system
B、Memory management unit
C、Cache Controller
D、Bus interface unit in CPU

11、A computer system using virtual memory technology needs to establish an address mapping table in order to map a program's virtual address to a physical address, where is the address mapping table stored?
A、Cache
B、Memory
C、Hard disk
D、Memory Management Unit

12、A 32-bit computer system uses virtual memory technology, memory paging management, 4kB per page, the mapping of virtual address to physical address is implemented by a one-level page table. The page table initially contains valid data as shown in the figure. What is the physical address of the memory corresponding to the given virtual address 8217? Entry number V Physical page number 0 1 2 …… 0 0 2 1 4 …… 0 0 4 1 3 …… 0 0 6 1 1536 …… 0 0
A、8217
B、16409
C、12393
D、16384

13、What steps must be taken to access the data during the program running in the computer system using virtual memory technology and cache?
A、Access the TLB, access the cache
B、Accessing the cache
C、Access page tables, access memory
D、Access page tables, access memory, access hard disk

14、The memory management of the computer system adopts the paging mode, and the page size is set to 4KB, so which of the address wires given by the program are used to address the offset within the page?
A、A9~A0
B、A12~A0
C、A11~A0
D、A31~A20

15、If a 32-bit computer system uses paging to manage memory, the page size is set to 4KB, and a one-level page table is used, then how many page table entries should be created for the program when the computer system loads the program into memory?
A、256K
B、1M
C、512K
D、128K

16、It is known that computer system programs use 32-bit virtual addresses to access storage units. If the physical memory space of the computer system is 1GB, and the paging management mechanism is adopted, the page size is 4KB, and each page table entry is 4B. If only one level of page table is used to realize the mapping from virtual address to physical address, how much memory space does the page table occupy?
A、4KB
B、4MB
C、1KB
D、1MB

17、What is the meaning of cache direct mapping strategy in computer storage system？
A、A line of information in memory can only be mapped to a specific line in the cache
B、A line of information in memory can be mapped to any line in the cache
C、A line of information in memory can be mapped to some specific lines in the cache
D、A line of information in the cache only be mapped to a specific line in memory

18、When the computer cache uses a direct mapping strategy, which of the following is the correct statement about the cache controller processing the physical address given by the CPU?
A、The physical memory address is divided into three parts: the lower part is used as the byte offset in the cache line, the middle part is used as the cache line index, and the remaining high part is used as the cache line tag
B、The physical memory address is divided into three parts: the lower part is used as the byte offset in the cache line, the middle part is used as the group index of the cache, and the remaining high part is used as the cache line tag
C、The physical memory address is divided into three parts: the lower part is used as the byte offset in the cache line, the middle part is used as the way index of the cache, and the remaining high part is used as the cache line tag
D、The physical memory address is divided into two parts: the lower part is used as the byte offset in the cache line, and the remaining high part is used as the cache line tag

19、It is known that the physical storage space of a computer system is 4GB, the cache data capacity is 2MB, each line can store 128B data, and the direct mapping strategy is adopted. How much extra storage space needs to be equipped with the cache controller to store other information?
A、16KB
B、192Kb
C、16Kb
D、192KB

20、It is known that the physical storage space of a computer system is 4GB, the cache data capacity is 2MB, each line can store 128B data, and the fully associative mapping strategy is adopted. How much extra storage space needs to be equipped with the cache controller to store other information?
A、416KB
B、192Kb
C、416Kb
D、192KB

21、It is known that the physical storage space of a computer system is 4GB, the cache data capacity is 2MB, each line can store 128B data, and the 16 way set associative mapping strategy is adopted. How much extra storage space needs to be equipped with the cache controller to store other information?
A、192Kb
B、416Kb
C、224Kb
D、224KB

22、It is known that a computer system has 512MB of memory, 2MB of cache, and 128B of cache per line. What are the bit width of tags in the cache adopting direct mapping, 4-way set associative mapping, and full associative mapping, respectively?
A、8, 10, 22
B、10, 8, 22
C、22, 10, 8
D、10, 22, 8

23、It is known that a direct mapping cache controller divides the 32-bit physical address into the following three parts:Tag(b31 ~ b12 ), line index (b11 ~ b6), in-line offset( b5 ~ b0) How many bytes/line of data can this cache store? How many lines are there in the cache? What is the total capacity (in bits) of a cache line containing valid bits,tags and data?
A、64B, 64 lines, 533b
B、64B, 64 lines, 533B
C、32B, 32 lines, 85b
D、32B, 32 lines, 85B

24、It is known that a computer system has 1GB of memory, 2MB of cache, and 256B per cache line. A direct mapping strategy is used. When the CPU accesses the physical address 0x00008080, Which cache line does the cache controller compares the tag in the cache to confirm whether it hits? What is the tag that the physical address corresponds to?
A、128, 0
B、0, 0
C、0, 128
D、2056, 128

25、It is known that the total cache capacity of a 32-bit computer system is 24 words, 2 words per line, using a 3-way set associative mapping strategy. Which of the addresses will the cache hit, when the CPU access the following physical addresses in sequence: 21, 166, 201, 143, 61, 167, 62, 133, 111, 136, 144, 56?
A、167, 62, 136, 56
B、167, 133, 136, 56
C、201, 167, 111, 144
D、62, 133, 111, 136

26、The cache capacity of a computer storage system is 64B, each row is 8 bytes, a total of 8 lines, the line number is from 0 to 7, and the 2-way set associative mapping strategy is adopted. Initially, there is no data in the cache, and the valid bits of all lines are 0. Which lines of the cache can the data at the address 0x12 in the memory be loaded into?
A、line 2
B、line 6
C、line 1
D、line 0

27、When the cache in the computer storage system uses a direct mapping strategy, what are the information stored in each line of the cache?
A、tag
B、v (valid bit)
C、data or instruction
D、line index

28、When the CPU writes data to the memory and the cache hits, which of the following write strategies may be adopted by the cache controller?
A、write through
B、write back
C、write with allocate
D、write without allocate

29、When the CPU writes data to the memory and the cache misses, which of the following write strategies may be adopted by the cache controller?
A、write through
B、write back
C、write with allocate
D、write without allocate

30、After the cache in the computer storage system has been full, if new data in the memory is still to be filled into the cache, the cache controller must adopt a certain strategy to replace the outdated data in the cache. Which of the following strategies are used for replacement?
A、First In Fisrt Out
B、Last In Fisrt Out
C、Random
D、Least Recently Used

31、Which of the following statements about virtual memory correct?
A、Virtual storage refers to using part of the storage space of the hard disk as memory
B、The addresses given by programs running in computer systems using virtual memory technology are all virtual addresses
C、Virtual memory is implemented by hardware and operating system to implement information access scheduling and management
D、The principle of virtual storage means that only the programs or data to be run by the software will be saved to the memory, and the remaining programs or data that are not running are still stored on the hard disk

32、In order to improve the address translation speed, a TLB table is usually used in the cache to store the recently used address mapping relationship. If the TLB table uses fully associative mapping strategy, which of the following information must the TLB table contain?
A、virtual page number
B、physical page number
C、in page offset
D、v(valid bit)

33、When the computer system manages memory in paging mode, it is required that the addresses of each page do not overlap each other.

34、When the computer system manages memory in paging mode, the page size is set to a fixed value when the computer hardware system is designed.

35、When there is a cache in the computer system, all the data that the CPU accesses the memory can be directly obtained from the cache.

36、When the CPU accesses the memory, if the cache misses, the cache controller loads a line of data in the memory starting from the current physical address to the corresponding line in the cache.

37、The cache controller in the computer storage system is realized by hardware circuit.

cache filling process

1、It is known that a computer system has 1GB memory, 2MB cache, 64B per line, and 16-way set mapping strategy. It is known that the valid bits of lines 1, 2, 6, 17, 18, and 32 of the cache are 1s, and the corresponding line tags are: 80, 100, 120, 140, 160, 180, and the remaining lines are all 0s. Try to explain whether the cache hits when the CPU accesses the address: 10,485,885, 12,301,068, 15,729,034, 16,396,087, 18,351,186, 23,595,008? step 1: calculate the set index and tag of each memory address step 2: calcuate the set index of each cache line with tags step 3: compare the tags of the memory address and the related cache set, if they are same, hits, otherwise, misses.

学习通Principle of Microcomputer_1

Principle of Microcomputer_1是一门介绍微型计算机原理的课程，其主要内容包括计算机的基本概念、计算机的组成与结构、数据的表示与运算、指令系统与程序设计等。

计算机的基本概念

计算机是一种能够按照预先设定的程序，自动地高速运算、处理数据的现代电子计算机器。计算机由硬件和软件两部分组成。硬件包括中央处理器(CPU)、内存、输入设备、输出设备和存储设备等，而软件则包括操作系统、应用软件和系统软件等。

计算机的组成与结构

计算机的组成包括中央处理器(CPU)、存储器、输入输出(I/O)设备和总线等。其中，中央处理器(CPU)是计算机的核心部件，它包括运算器和控制器两部分，分别负责运算和控制。存储器则分为主存储器和辅助存储器两种，主存储器用于暂时存储数据和程序，而辅助存储器则用于长期存储数据和程序。输入输出(I/O)设备则用于与外部设备进行数据交换，总线则是连接各部件的数据传输通道。

数据的表示与运算

计算机中的数据以二进制形式表示，其中每一位称为一个二进制位(bit)，而每八位则组成一个字节(byte)。在计算机中，数据的运算主要分为逻辑运算和算术运算两种。逻辑运算包括与、或、非、异或等运算，而算术运算则包括加、减、乘、除等基本运算，同时还有位移运算等。

指令系统与程序设计

指令系统是一组计算机指令的集合，它是计算机硬件与软件之间的桥梁。指令系统分为两种类型：RISC指令集和CISC指令集。程序设计则是指根据特定的算法和逻辑，将高级语言编写的程序翻译成计算机能够理解和执行的机器语言的过程。常见的高级语言包括C语言、Java语言等。

总结

Principle of Microcomputer_1课程介绍了计算机的基本概念、组成与结构、数据的表示与运算、指令系统与程序设计等知识，为学习计算机科学提供了基础。同时，课程还重点介绍了CPU的结构和工作原理，以及数据总线、地址总线和控制总线的概念。

（）下列哪一项不属于行为职责的范畴

A.唐天宗将葡萄种植于皇家园林，亲自监制以其酿酒，并将以其酿成的美酒赏赐给大臣。（）
B.思维导图是管理点线面的组织性思维工具。
C.风寒发热运用到耳后高骨穴
D.转向桥由　　　　　　、　　　　　　、　　　　　　和　　　　　　等主要部分组成。

当一个飞轮绕一个固定轴作匀速转动时, 飞轮上离开轮心某一点的（）

A.Flash内嵌的脚本程序是______。
B.图示电路。\n\n
C.戊戌维新运动的成果之一是其创建了()
D.诊断为AMI的病人常规4项处理不包括

下列关于初等矩阵的结论正确的有：

A.在图示电路中，B点的电位VB为
B.感染性疾病与传染病的主要区别是
C.铁人精神是北大荒精神的源头活水
D.冬期施工搅拌混凝土时，可将水加热，但水泥不应与80℃以上的热水直接接触。

哪一项不属血虚证的临床表现：（）

A.VANET的隐私泄露风险包括身份隐私泄露和位置隐私泄露。
B.离合器与联轴器的不同点为（）
C.下面有关遵守法律的认识正确的是
D.地下室砼墙体一般只允许留设水平施工缝，其位置宜留在受（）处。

关于自然人的出生时间的有关证明文件，根据其优先效力，下列排列正确的是：

A.afe530ef2d8f479ba9a2caf432947324.png
B.原尿中有用物质再次回到血液是（）
C.旅游目的地资源开发的目标是什么
D.下列配离子中,属于高自旋的是

分光光度法的吸光度与（）有关。

A.苌乃周出身书香门第，从小受到了良好的文化熏陶，为以后的创拳立派奠定了文化基础。
B.计算机按用途可分为( )
C.以下描述错误的是（）。
D.It was and I felt cold.

（）时，应当采用扩张的财政政策和扩张的货币政策。

A.大洋中脊贯穿太平洋、印度洋和大西洋（）
B.What is the common theme of the Western
C.跨国合营企业的注册资本是双方实缴额而不是认缴额。()
D.做慕斯的饼干底，既可用机械搅拌成粉状，也可用手工的方式擀成粉状。

入则孝这一部分内容，一开始就说了一个（）。

A.耐酸耐酶的青霉素是（）。
B.有关肠造口袋照护错误的是
C.下面哪些参数属于天线的电气指标（）
D.图形文件一般来说可分为两大类：位图和______。

根据人力资源管理职能相关内容,“蜀中无大将,廖化当先锋”属于蜀汉()环节出问题

A.出生后，胎儿血液循环发生改变，卵圆孔、动脉导管和静脉导管都会逐渐闭合。
B.朱熹认为，“理”在万物中各有表现，他称之为“________”。
C.一般来说标准唇上下唇比例是（）。
D.十万元借款到期，现还本付息，按照六步骤方法做出相应会计处理。

指纹根据其形状可以被分为五个不同的类别,但这些类别中不包括()。

A.以下有关微信时代的时间管理正确的是：
B.液压控制阀按用途分类为压力控制阀、（）和方向控制阀
C.模拟面试就是通过为求职者安排，让
D.在以下事项中，影响资产评估结果价值类型的直接因素是（）。

右肺动脉横断层面上的肺段不包括

A.偶第三方，东风风光，梵蒂冈梵蒂冈。
B.嘴唇过厚，唇膏应选用偏冷的颜色。
C.任何科学理论都不能穷尽真理，只能在实践中不断开辟认识真理的道路。这说明（）。
D.楔键的上表面和轮毂键槽的底部有（）的斜度。

我国有关软件保护的法规《中华人民共和国著作权法》于（）年施行

A.以下哪位建筑师不属于“维也纳分离派”
B.WWW浏览器是（）。
C.6. KMP算法的特点是在模式匹配时指示主串的指针不会回溯。
D.对于n阶线性定常系统，下列论述正确的是（）。

调配毒性中药饮片时，未注明生用的一律付炮制品

A.南派武术的特点是气势雄劲、大开大合、蹿纵跳跃、舒展大方。
B.机械振动式采收机的关键设计参数为： ( )
C.法治思维方式与人治思维方式有着根本的区别，下列关于二者的说法，正确的是（）。
D.下列哪种物质不是TD-Ag

事实上，强迫行为是一种象征性的解除焦虑的心理防卫机制。

A.“多多益善”这个成语出自刘邦与韩信闲聊,韩信认为刘邦带兵多多益善。()
B.注塑过程不一定需要有保压阶段，请判断对错。
C.以下属于医德他律机制的有
D.下列哪项不是骨关节炎的临床表现（）